{"title":"A New Cascaded SuperCascode High Voltage Power Switch","authors":"U. Mehrotra, D. Hopkins","doi":"10.1109/APEC42165.2021.9487049","DOIUrl":null,"url":null,"abstract":"Medium Voltage (MV), High Current (HC) switches are growing in demand for MV applications in land, sea and air transport, fast charging, renewable energy, and a host of applications in pulsed power, e.g. solid-state protection. However, widespread adoption of commercially available MV-HC modules is limited due to retracted dynamic performance from paralleling many high voltage, low current semiconductors. The associated cost is relatively high because of low yield, and expensive material and fabrication. An alternative is series connection of Low Voltage (LV)-HC semiconductors to form a SuperCascode (SC) power switch. This paper introduces a Cascaded SuperCascode (CSC) power switch topology that scales to very high voltages (>100 kV) or applied to optimize previously reported MV SCs to achieve higher switching speed, reduced balancing network size and lower switching losses. This paper describes the design of the balancing network for optimized CSC switch switching speed, and provides simulation and test results of a 6.5 kV power switch. The switch simulated to show a 4.5x improvement in switching speed (avg of Ton and Toff), 40% reduction in switching losses, 60% net charge reduction in network capacitors (i.e. size reduction) and superior avalanche energy management for greater short circuit performance compared to other SCs. The switch was fabricated and tested showing 408 mΩ, 0.7 mA @ 4.8 kV and 23ns rise and 50ns fall in current at 4kV for 50A switching from double-pulse testing (DPT).","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC42165.2021.9487049","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Medium Voltage (MV), High Current (HC) switches are growing in demand for MV applications in land, sea and air transport, fast charging, renewable energy, and a host of applications in pulsed power, e.g. solid-state protection. However, widespread adoption of commercially available MV-HC modules is limited due to retracted dynamic performance from paralleling many high voltage, low current semiconductors. The associated cost is relatively high because of low yield, and expensive material and fabrication. An alternative is series connection of Low Voltage (LV)-HC semiconductors to form a SuperCascode (SC) power switch. This paper introduces a Cascaded SuperCascode (CSC) power switch topology that scales to very high voltages (>100 kV) or applied to optimize previously reported MV SCs to achieve higher switching speed, reduced balancing network size and lower switching losses. This paper describes the design of the balancing network for optimized CSC switch switching speed, and provides simulation and test results of a 6.5 kV power switch. The switch simulated to show a 4.5x improvement in switching speed (avg of Ton and Toff), 40% reduction in switching losses, 60% net charge reduction in network capacitors (i.e. size reduction) and superior avalanche energy management for greater short circuit performance compared to other SCs. The switch was fabricated and tested showing 408 mΩ, 0.7 mA @ 4.8 kV and 23ns rise and 50ns fall in current at 4kV for 50A switching from double-pulse testing (DPT).