Chaos computing for mitigating side channel attack

Abstract

Chaos computing is an unconventional paradigm for computing where chaotic oscillators are used for computation. As chaotic oscillators dynamically produce a large number of unique patterns over time, a single oscillator can be configured to produce different logic gates. Even the same logic functionality can be implemented using the same chaos gate but with different configurations. Chaotic implementations of logic thus provides opportunities for building instances of computing system with similar hardware but different configurations of operation, thus being capable of mitigating side channel based reverse engineering attack. In this paper, we explore the opportunities of mitigating side channel power attack vulnerabilities of conventional digital computing systems using chaos based logic. We perform an instruction classification attack using side channel power profiles on arithmetic logic units (ALU), considered for different proportions of conventional logic gates and chaotic logic gates. Quantitative analysis based on a classification algorithm shows that an ALU implemented with even a small proportion of chaotic gates can be classified with significantly lower accuracy compared to conventional alternatives.