Pattern Loading Effect Optimization of BEOL Cu CMP in 14nm Technology Node

Abstract

To achieve the local, as well as global, planarity of the wafer surface many innovative technologies have been developed. A robust Cu chemical mechanical polishing (CMP) process with better post CMP polishing profile, smooth copper surface, tighten metal line sheet resistance (Rs) and pattern loading control has been evaluated during the Cu CMP process at 14nm and beyond. It is well known that CMP causes pattern loading of a layer to be planarized due to uneven distribution of device structures and thus reducing the effectiveness of this technology. This paper will present how to improve pattern loading and dishing control with optimized polish methodology. Experiment results shown that there is no loading between dense line area and ISO line area, and better dishing performance.