Mei-Chen Chuang, C. Tai, Y. Hsu, A. Roth, E. Soenen
{"title":"A temperature sensor with a 3 sigma inaccuracy of ±2°C without trimming from −50°C to 150°C in a 16nm FinFET process","authors":"Mei-Chen Chuang, C. Tai, Y. Hsu, A. Roth, E. Soenen","doi":"10.1109/ESSCIRC.2015.7313879","DOIUrl":null,"url":null,"abstract":"Two compact thermal sensors in advanced technologies are compared. One uses a 20nm planar process, while the other uses a 16nm FinFET process. Both produce a digital temperature reading through the ratiometric conversion of a temperature-dependent and a temperature-independent current. The currents are integrated on an on-chip capacitor, which forms part of a single-bit first-order continuous-time JA modulator. As a result, the modulator does not require an extra op-amp and is insensitive to process variations. The 20nm design dissipates 1.1mW, occupies 0.018 mm2 and achieves a total temperature error of +2.5°C from -25°C to 125°C using a one-point trim. For extra accuracy, the 16nm design uses Dynamic Element Matching. Realized completely with FinFET transistors, it dissipates 1.21mW, occupies 0.0126 mm2 and achieves a total error of +2°C from -50°C to 150°C without any trim.","PeriodicalId":11845,"journal":{"name":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2015-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2015.7313879","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
Two compact thermal sensors in advanced technologies are compared. One uses a 20nm planar process, while the other uses a 16nm FinFET process. Both produce a digital temperature reading through the ratiometric conversion of a temperature-dependent and a temperature-independent current. The currents are integrated on an on-chip capacitor, which forms part of a single-bit first-order continuous-time JA modulator. As a result, the modulator does not require an extra op-amp and is insensitive to process variations. The 20nm design dissipates 1.1mW, occupies 0.018 mm2 and achieves a total temperature error of +2.5°C from -25°C to 125°C using a one-point trim. For extra accuracy, the 16nm design uses Dynamic Element Matching. Realized completely with FinFET transistors, it dissipates 1.21mW, occupies 0.0126 mm2 and achieves a total error of +2°C from -50°C to 150°C without any trim.