Efficiency Comparison of AC-Link and TIPS (SST) Topologies based on accurate device models

A. De, S. Roy, S. Bhattacharya
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引用次数: 5

Abstract

In this paper, a comparative study on AC-Link™ Topology and a conventional solid state transformer (TIPS) has been shown. Alongside, as a building block, a comparative device level design study has been shown for 6.5kV Si-IGBT/SiC JBS diode, 6.5kV Si-IGBT/Si-PiN Diode and 10kV SiC-MOSFET/SiC-JBS Diode for a zero voltage/current transition and hard switched condition for medium voltage application. It is shown that soft switching yields a considerable reduction of losses for all devices. A low voltage hardware device test prototype has been built and tested. The main motive of the paper is to make a fair judgment on the two topologies with accurate device testing. This is further extended to the maximum attainable frequency analysis, corresponding efficiency comparison, frequency transfer capability and various other topology based comparisons.
基于精确设备模型的AC-Link和TIPS (SST)拓扑效率比较
本文对AC-Link™拓扑和传统固态变压器(TIPS)进行了比较研究。此外,作为构建块,对6.5kV Si-IGBT/SiC JBS二极管,6.5kV Si-IGBT/Si-PiN二极管和10kV SiC- mosfet /SiC-JBS二极管进行了器件级比较设计研究,用于中压应用的零电压/电流转换和硬开关条件。结果表明,软开关可大大降低所有器件的损耗。建立了一个低压硬件设备测试样机并进行了测试。本文的主要目的是通过精确的器件测试对这两种拓扑结构做出公正的判断。这进一步扩展到最大可能的频率分析,相应的效率比较,频率传输能力和各种其他基于拓扑的比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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