Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip

Ammar Karkar, Nizar Dahir, Ra'ed Al-Dujaily, K. Tong, T. Mak, A. Yakovlev
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引用次数: 20

Abstract

Network-on-chip (NoC) is a communication paradigm that has emerged to tackle different on-chip challenges and has satisfied different demands in terms of high performance and economical interconnect implementation. However, merely metal based NoC pursuit offers limited scalability with the relentless technology scaling, especially in one-to-many (1-to-M) communication. To meet the scalability demand, this paper proposes a new hybrid architecture empowered by both metal interconnects and Zenneck surface wave interconnects (SWI). This architecture, in conjunction with newly proposed routing and global arbitration schemes, avoids overloading the NoC and alleviates traffic hotspots compared to the trend of handling 1-to-M traffic as unicast. This work addresses the system level challenges for intra chip multicasting. Evaluation results, based on a cycle-accurate simulation and hardware description, demonstrate the effectiveness of the proposed architecture in terms of power reduction ratio of 4 to 12X and average delay reduction of 25X or more, compared to a regular NoC. These results are achieved with negligible hardware overheads.
片上网络中一对多通信的线面波混合架构
片上网络(NoC)是为了解决不同的片上挑战而出现的一种通信范式,在高性能和经济的互连实现方面满足了不同的需求。然而,仅仅基于金属的NoC追求在无情的技术扩展中提供了有限的可扩展性,特别是在一对多(1对m)通信中。为了满足可扩展性需求,本文提出了一种由金属互连和Zenneck表面波互连(SWI)支持的新型混合架构。这种架构与新提出的路由和全局仲裁方案相结合,避免了NoC过载,缓解了流量热点,而不是像单播那样处理1对m流量。这项工作解决了芯片内多播的系统级挑战。基于周期精确仿真和硬件描述的评估结果表明,与常规NoC相比,所提出架构的功耗降低比为4至12倍,平均延迟降低25倍或更多。实现这些结果的硬件开销可以忽略不计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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