Surrounded Channel Junctionless Field Effect Transistor

Abstract

This paper presents the surrounded channel Junctionless field effect transistor (SCJLFET) concept. A study on electrical characteristics of a SCJLFET is also presented. The gate is placed inside the body of the device. In other words the gate is surrounded by the channel region. A simulation study on electrical performance of SCJLFET has been done in TCAD. The study shows that SCJLFET exhibits comparatively higher Ion/Ioff ratio, lower subthreshold swing and higher threshold voltage than a conventional JLFET.