A microcontroller with 96% power-conversion efficiency using stacked voltage domains

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) Pub Date : 2016-06-15 DOI:10.1109/VLSIC.2016.7573478

K. Blutman, A. Kapoor, A. Majumdar, Jacinto Garcia Martinez, J. Echeverri, L. Sevat, A. P. V. D. Wel, H. Fatemi, J. P. D. Gyvez, K. Makinwa

引用次数: 7

Abstract

This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

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采用堆叠电压域的具有96%功率转换效率的微控制器

本文提出了一种CMOS 40nm微控制器，其中首次使用堆叠电压域。该系统采用ARM Cortex M0+处理器、4kB ROM、16kB SRAM、外设和片上开关电容稳压器(SCVR)。通过使用电压堆叠，测试芯片实现了最先进的(96%)功率转换效率，根据负载电流的不同，功率节省从23%到63%，而电源电压变化从5.6mV降低到3.8mV (RMS)。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)

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