A flexible interface architecture for reconfigurable coprocessors in embedded multicore systems using PCIe Single-root I/O virtualization

O. Sander, S. Bähr, Enno Lübbers, T. Sandmann, Viet Vu Duy, J. Becker
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引用次数: 9

Abstract

Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In this paper, we propose a flexible interface architecture with low overhead for coupling reconfigurable coprocessors to high-performance general-purpose processors, allowing customized yet efficient construction of heterogeneous processing systems. Our implementation is based on PCI Express (PCIe) and optimized for virtualized systems, taking advantage of the SR-IOV capabilities in modern PCIe implementations. We describe the interface architecture and its fundamental technologies, detail the services provided to individual coprocessors and accelerator modules, and quantify key corner performance indicators relevant for virtualized applications.
使用PCIe单根I/O虚拟化的嵌入式多核系统中可重构协处理器的灵活接口架构
特别是在复杂的系统的场景中,多个高性能或实时处理功能需要共存和交互,可重构设备与虚拟化技术一起显示出相当大的希望,以提高效率,简化集成和维护单个功能的功能和非功能属性。在本文中,我们提出了一种低开销的灵活接口架构,用于将可重构协处理器耦合到高性能通用处理器,从而允许定制而高效地构建异构处理系统。我们的实现基于PCI Express (PCIe)并针对虚拟化系统进行了优化,充分利用了现代PCIe实现中的SR-IOV功能。我们描述了接口架构及其基本技术,详细介绍了为单个协处理器和加速器模块提供的服务,并量化了与虚拟化应用相关的关键拐角性能指标。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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