M. Furuta, K. Ban, Daisuke Kobayashi, Tomoyuki Shibata
{"title":"An Efficient Implementation of FPGA-based Object Detection Using Multi-scale Attention","authors":"M. Furuta, K. Ban, Daisuke Kobayashi, Tomoyuki Shibata","doi":"10.1109/MWSCAS47672.2021.9531732","DOIUrl":null,"url":null,"abstract":"Convolutional neural network (CNN)-based object detection has become an important task in image pre-processing for security video surveillance cameras. Since CNNs require a large amount of computational power, the approach of FPGA-based implementation has emerged as a promising solution owing to its energy efficiency and processing speed. The single-shot multibox detector (SSD) is suitable for this kind of application, while reducing the CNN computational load need to achieve high detection accuracy is still an important challenge for FPGA design. This paper presents an FPGA accelerator for processing SSD object detection. The number of computations can be reduced by the proposed multi-scale spatial attention mechanism. To enhance the efficiency for hardware implementation of the CNN, we propose dynamic quantization on hardware and autonomous memory access control. The developed prototype based on SSD with multi-scale spatial attention mechanism implemented on XCZU7EV exhibits an object detection accuracy of 79.3% mean average precision on the PASCAL VOC dataset. The proposed design achieves high digital signal processor efficiency of 94% and good operation speed of 77.7 msec.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"8 1","pages":"321-325"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS47672.2021.9531732","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Convolutional neural network (CNN)-based object detection has become an important task in image pre-processing for security video surveillance cameras. Since CNNs require a large amount of computational power, the approach of FPGA-based implementation has emerged as a promising solution owing to its energy efficiency and processing speed. The single-shot multibox detector (SSD) is suitable for this kind of application, while reducing the CNN computational load need to achieve high detection accuracy is still an important challenge for FPGA design. This paper presents an FPGA accelerator for processing SSD object detection. The number of computations can be reduced by the proposed multi-scale spatial attention mechanism. To enhance the efficiency for hardware implementation of the CNN, we propose dynamic quantization on hardware and autonomous memory access control. The developed prototype based on SSD with multi-scale spatial attention mechanism implemented on XCZU7EV exhibits an object detection accuracy of 79.3% mean average precision on the PASCAL VOC dataset. The proposed design achieves high digital signal processor efficiency of 94% and good operation speed of 77.7 msec.