Detection of thin oxide (3.5 nm) dielectric degradation due to charging damage by rapid-ramp breakdown

T. Hook, D. Harmon, Chuan Lin
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引用次数: 20

Abstract

It is shown that the primary manifestation of charging damage in thin (<4 nm) oxides is a degradation of dielectric integrity, while the primary manifestation of damage in thick (>6 nm) oxides is a shift in threshold voltage or the degradation of hot-carrier immunity. It is therefore necessary to effectively monitor both dielectric integrity and the parametric shifts to measure all of the consequences of charging damage on a technology with gate oxide less than 4 nm. We demonstrate the efficacy of a ramp breakdown methodology for this purpose, showing that a simple measurement of current is not sufficiently sensitive, and that results equivalent to a lengthy time-to-breakdown test may be achieved. Furthermore, we show ramp data on some thousands of chips from a manufacturing line, which demonstrates robust charging behavior for realistic gate and wiring antennas.
快速斜坡击穿充电损伤引起的薄氧化物(3.5 nm)介电退化检测
结果表明,在薄(6nm)氧化物中,充电损伤的主要表现是阈值电压的移动或热载流子抗扰度的降低。因此,有必要有效地监测电介质完整性和参数位移,以测量栅极氧化物小于4 nm的充电损伤技术的所有后果。我们证明了斜坡击穿方法的有效性,表明简单的电流测量不够灵敏,并且可以获得相当于长时间击穿测试的结果。此外,我们展示了来自生产线的数千个芯片的斜坡数据,这证明了现实栅极和布线天线的稳健充电行为。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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