Tamer A. Ali, Won Ho Park, P. Mulage, Ehung Chen, R. Ho, C. Yang
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引用次数: 0
Abstract
This paper presents a clock-forwarding link architecture for 12Gbps 100+ meters copper cable. The delivery of a low jitter forward clock along the entire cable is enabled by an FIR filtering technique, a low-jitter configurable PLL/MDLL and the proper choice of forwarded frequency Total jitter at the end of the cable is 4.4ps RMS. The data signal is repeated every 8m. The link at each repeater occupies 0.095mm2 of area in a 65nm technology dissipating 48mW.