A 57.9-to-68.3GHz 24.6mW frequency synthesizer with in-phase injection-coupled QVCO in 65nm CMOS

Xiang Yi, C. Boon, Hang-Ji Liu, Jia-fu Lin, J. Ong, W. M. Lim
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引用次数: 35

Abstract

Under the influence of increasing demand for high-data-rate communication systems such as 60GHz band applications, the requirements of PLLs keep getting higher. In a mm-Wave direct-conversion transceiver, the quadrature LO signal generation is challenging. The conventional techniques to generate quadrature LO signals suffer from many problems. The method of using a divide-by-2 divider after a VCO with double LO frequency is popular in multi-GHz designs, but it is difficult to be realized at mm-Wave frequencies. Employing passive RC complex filters is another way to generate quadrature signals, but high power is required to compensate its loss. The conventional parallel-coupled QVCO seems to be a good choice for mm-Wave application. However, the approach suffers from poor phase noise. This work presents a fully integrated 57.9-to-68.3GHz frequency synthesizer, which employs an in-phase injection-coupled QVCO (IPIC-QVCO) to produce low-phase-noise quadrature signals with low power.
57.9 ~ 68.3 ghz 24.6mW同相注入耦合QVCO频率合成器
在60GHz频段应用等高数据速率通信系统需求不断增长的影响下,对锁相环的要求也越来越高。在毫米波直接转换收发器中,正交LO信号的产生具有挑战性。传统的正交本征信号生成方法存在许多问题。在多ghz设计中,在双LO频率的压控振荡器后加1 / 2分频器是常用的方法,但在毫米波频率下很难实现。采用无源RC复合滤波器是产生正交信号的另一种方法,但需要高功率来补偿其损耗。传统的并行耦合QVCO似乎是毫米波应用的一个很好的选择。然而,该方法存在相位噪声差的问题。本文提出了一种完全集成的57.9 ~ 68.3 ghz频率合成器,该合成器采用同相注入耦合QVCO (IPIC-QVCO)产生低功耗的低相位噪声正交信号。
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