Enhanced Reliability of 7nm Process Technology featuring EUV

Kihyun Choi, H. Sagong, Wonchang Kang, Hyunjin Kim, J. Hai, Miji Lee, Bomi Kim, Miji Lee, Soonyoung Lee, H. Shim, Junekyun Park, Youngwoo Cho, H. Rhee, S. Pae
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引用次数: 4

Abstract

In this paper, we report the reliability characterization of 7nm FinFET technology, in which the highly scaled 6th generation of FinFETs and 256Mbit SRAM cells was newly developed by utilizing EUV. The single EUV patterning of MOL and BEOL resulted in significantly improved reliability distribution as compared to the previous nodes with multiple patterning techniques. The successful demonstration on product reliability including SRAM, Logic HTOL, and SER as technology evaluation was performed, indicating the 7nm technology+EUV is ready for high volume manufacturing.
采用EUV技术的7nm制程技术可靠性增强
在本文中,我们报告了7nm FinFET技术的可靠性表征,其中利用EUV新开发了高尺寸的第六代FinFET和256Mbit SRAM单元。MOL和BEOL的单EUV模式与之前使用多模式技术的节点相比,显著改善了可靠性分布。通过对SRAM、Logic HTOL和SER等产品可靠性的技术评估,表明7nm技术+EUV已经准备好进行大批量生产。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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