An algorithm to deal with incremental layout alteration

Abstract

Incremental design alteration usually requires complete rework on the IC layout. An algorithm is proposed which tackles the problem in minimum time and creates the least perturbation to the original layout, preserving performance. The algorithm aims at automatic adjustment of layout due to minor change on logic design. As a result, the designer need not re-execute the whole placement process or manually correct the placement. Using dynamic variables to form the database, it is more efficient to implement the algorithm. Results and computation time of the algorithm are also found advantageous.<>