A novel combined first and second order Lagrange interpolation sampling process for a digital class D amplifier

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) Pub Date : 2004-05-23 DOI:10.1109/ISCAS.2004.1328726

V. Adrian, B. Gwee, J. Chang

引用次数: 2

Abstract

In this paper, we propose a sampling process for low voltage (1.1V) power-critical low-distortion digital class D amplifiers. The sampling process combines first and second-order Lagrange interpolation techniques to effectively increase the sampling rate without the usual overheads. The computation is also simple. The complete class D amplifier features a very low power dissipation (58.8/spl mu/W), low total harmonic distortion (-85.6dB FS) and high signal-to-noise ratio (99dB FS). The power saving is /spl sim/21% and the THD is improved by 9.8dB FS compared to a design embodying only a first order sampling process. We also provide an analysis of the power dissipation of the load power.

查看原文本刊更多论文

一种用于数字D类放大器的一阶和二阶联合拉格朗日插值采样方法

在本文中，我们提出了一种用于低电压(1.1V)功率临界低失真数字D类放大器的采样过程。采样过程结合了一阶和二阶拉格朗日插值技术，有效地提高了采样率，而没有通常的开销。计算也很简单。完整的D类放大器具有极低的功耗(58.8/spl mu/W)，低总谐波失真(-85.6dB FS)和高信噪比(99dB FS)。与仅采用一阶采样过程的设计相比，功耗节省了21%，THD提高了9.8dB FS。并对负载电源的功耗进行了分析。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

自引率

0.00%

发文量