{"title":"Testability analysis module of FMECA processor","authors":"Z. Bluvband, A. Barel","doi":"10.1109/RMCAE.1992.245504","DOIUrl":null,"url":null,"abstract":"Contemporary concurrent engineering increasingly uses multidisciplinary teams. This results in consideration of tasks related to product assurance requirements early in the design process. These requirements usually include quality assurance, reliability, maintainability and ILS. One of the most powerful tools for these design activities is Failure Mode Effects and Criticality Analysis (FMECA). The authors discuss the integration of testability analysis tasks into FMECA. Reliability data used for FMECA, may be also useful for qualitative and quantitative testability analysis. These data include: product tree (hardware or functional), failure modes, item failure rates, failure mode ratio, detection method. Defining all these data requires considerable effort by the engineer performing FMECA. Even if a computerized tool (FMECA processor) is used to reduce the time required for data entry processing, the engineer must still invest considerable time in constructive thinking. Thus, a program for testability analysis, able to utilize available data from FMECA processor files, is desirable. With the addition of a relatively small amount of data, the program would be able to perform all the main tasks of testability analysis, including BIT coverage analysis, fault isolation resolution analysis. Basic principles and ideas involved in building such a testability analysis module (TAM) are discussed.<<ETX>>","PeriodicalId":59272,"journal":{"name":"计算机辅助工程","volume":"68 1","pages":"109-116"},"PeriodicalIF":0.0000,"publicationDate":"1992-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"计算机辅助工程","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/RMCAE.1992.245504","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Contemporary concurrent engineering increasingly uses multidisciplinary teams. This results in consideration of tasks related to product assurance requirements early in the design process. These requirements usually include quality assurance, reliability, maintainability and ILS. One of the most powerful tools for these design activities is Failure Mode Effects and Criticality Analysis (FMECA). The authors discuss the integration of testability analysis tasks into FMECA. Reliability data used for FMECA, may be also useful for qualitative and quantitative testability analysis. These data include: product tree (hardware or functional), failure modes, item failure rates, failure mode ratio, detection method. Defining all these data requires considerable effort by the engineer performing FMECA. Even if a computerized tool (FMECA processor) is used to reduce the time required for data entry processing, the engineer must still invest considerable time in constructive thinking. Thus, a program for testability analysis, able to utilize available data from FMECA processor files, is desirable. With the addition of a relatively small amount of data, the program would be able to perform all the main tasks of testability analysis, including BIT coverage analysis, fault isolation resolution analysis. Basic principles and ideas involved in building such a testability analysis module (TAM) are discussed.<>