Side-channel security of superscalar CPUs : Evaluating the Impact of Micro-architectural Features

Alessandro Barenghi, Gerardo Pelosi
{"title":"Side-channel security of superscalar CPUs : Evaluating the Impact of Micro-architectural Features","authors":"Alessandro Barenghi, Gerardo Pelosi","doi":"10.1145/3195970.3196112","DOIUrl":null,"url":null,"abstract":"Side-channel attacks are performed on increasingly complex targets, starting to threaten superscalar CPUs supporting a complete operating system. The difficulty of both assessing the vulnerability of a device to them, and validating the effectiveness of countermeasures is increasing as a consequence. In this work we prove that assessing the side-channel vulnerability of a software implementation running on a CPU should take into account the microarchitectural features of the CPU itself. We characterize the impact of microarchitectural features and prove the effectiveness of such an approach attacking a dual-core superscalar CPU.","PeriodicalId":6491,"journal":{"name":"2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)","volume":"38 1","pages":"1-6"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3195970.3196112","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19

Abstract

Side-channel attacks are performed on increasingly complex targets, starting to threaten superscalar CPUs supporting a complete operating system. The difficulty of both assessing the vulnerability of a device to them, and validating the effectiveness of countermeasures is increasing as a consequence. In this work we prove that assessing the side-channel vulnerability of a software implementation running on a CPU should take into account the microarchitectural features of the CPU itself. We characterize the impact of microarchitectural features and prove the effectiveness of such an approach attacking a dual-core superscalar CPU.
超标量cpu的侧通道安全性:评估微架构特性的影响
侧信道攻击的目标越来越复杂,开始威胁支持完整操作系统的超标量cpu。因此,评估设备对它们的脆弱性以及验证对策有效性的难度正在增加。在这项工作中,我们证明了评估运行在CPU上的软件实现的侧信道漏洞应该考虑CPU本身的微架构特征。我们描述了微架构特征的影响,并证明了这种方法攻击双核超标量CPU的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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