Precise three-channel integrated time counter

R. Szplet, P. Kwiatkowski, Z. Jachna, K. Rozyc
{"title":"Precise three-channel integrated time counter","authors":"R. Szplet, P. Kwiatkowski, Z. Jachna, K. Rozyc","doi":"10.1109/FCS.2015.7138910","DOIUrl":null,"url":null,"abstract":"We present a design, FPGA-based implementation and test results of a new three-channel time interval counter developed for a project called Legal Time Distribution System (LTDS). The main aim of the counter is to gather information about time drift of clocks involved into the LTDS, then to evaluate their stability, and finally to select the most stable one as a local clock. The counter provides a high measurement precision (<; 15 ps) and wide range (> 1s) that are obtained by combining period counting with two-stage time interpolation. The time counter is implemented in a universally available and relatively cheap programmable device from family Spartan-6 (Xilinx).","PeriodicalId":57667,"journal":{"name":"时间频率公报","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2015-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"时间频率公报","FirstCategoryId":"1089","ListUrlMain":"https://doi.org/10.1109/FCS.2015.7138910","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

We present a design, FPGA-based implementation and test results of a new three-channel time interval counter developed for a project called Legal Time Distribution System (LTDS). The main aim of the counter is to gather information about time drift of clocks involved into the LTDS, then to evaluate their stability, and finally to select the most stable one as a local clock. The counter provides a high measurement precision (<; 15 ps) and wide range (> 1s) that are obtained by combining period counting with two-stage time interpolation. The time counter is implemented in a universally available and relatively cheap programmable device from family Spartan-6 (Xilinx).
精确的三通道集成时间计数器
我们提出了一个设计,基于fpga的实现和一个新的三通道时间间隔计数器的测试结果,该计数器是为一个名为合法时间分配系统(LTDS)的项目开发的。计数器的主要目的是收集LTDS中涉及的时钟的时间漂移信息,然后评估它们的稳定性,最后选择最稳定的时钟作为本地时钟。计数器提供了高的测量精度(15),这是通过结合周期计数和两阶段时间插值获得的。时间计数器是在一个普遍可用的和相对便宜的可编程设备从斯巴达-6 (Xilinx)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
1135
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信