Single-clock-cycle, multilayer encryption algorithm for single-channel IoT communications

Abstract

Pulsed-Index Communication (PIC) is a novel technique for single-channel, high-data rate, low-power dynamic signaling that does not require any clock and data recovery. It is fully adapted to the simple yet robust communication needs of Internet of Things (IoT) devices and sensors. However, securing PIC using available conventional symmetric block cipher techniques is not feasible as it significantly degrades PIC attributes of low power, small area, and high data rates. For instance, symmetric stream ciphers such as A5/1 need several clock cycles to encrypt the data, which would reduce the PIC data rate. In this paper, we present a modified A5/1 cipher technique, called MA5/1, that generates a full keystream in one clock cycle, this securing PIC while satisfying all its requirements. Furthermore, using PIC's salient feature of transmitting index pulse streams, we provide an additional layer of packet security that makes it difficult for an attacker to receive and decode the packet before targeting MA5/1. When combined, these two techniques present a two-layer, hard-to-break challenge to an attacker, thus protecting PIC communication in an IoT network. The secure PIC is prototyped and verified in both FPGA and ASIC. In particular, we show that for an ASIC implementation in 65nm technology, the low-power operation of PIC is maintained, consuming only 27μW of power at a clock frequency of 25MHz.