R. G. Gironés, R. Colom-Palero, Joaquín Cerdá-Boluda, A. Sebastià-Cortés
{"title":"FPGA Implementation of a Pipelined On-Line Backpropagation","authors":"R. G. Gironés, R. Colom-Palero, Joaquín Cerdá-Boluda, A. Sebastià-Cortés","doi":"10.1007/s11265-005-4961-3","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"101 1","pages":"189-213"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"46","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of VLSI signal processing systems for signal, image, and video technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s11265-005-4961-3","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}