Hyosup Won, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae
{"title":"An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization","authors":"Hyosup Won, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae","doi":"10.1109/CICC.2015.7338374","DOIUrl":null,"url":null,"abstract":"An on-chip stochastic sigma-tracking eye-opening monitor (SSEOM) for background adaptive equalization is presented. The proposed SSEOM detects the BER-related eye opening area accurately with a feasible degree of time/area efficiency without an external microcontroller. In addition, the SSEOM determines the BER-optimal equalization parameters for both CTLE and DFE by incorporating a pattern-dependent eye-tracking scheme. Auxiliary data samplers are employed in parallel with data samplers to track link variations and adjust the equalization parameters in the background. A 28-Gb/s CDR including a SSEOM-based adaptive equalizer is fabricated in 40nm CMOS for an evaluation.","PeriodicalId":6665,"journal":{"name":"2015 IEEE Custom Integrated Circuits Conference (CICC)","volume":"194 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2015.7338374","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
An on-chip stochastic sigma-tracking eye-opening monitor (SSEOM) for background adaptive equalization is presented. The proposed SSEOM detects the BER-related eye opening area accurately with a feasible degree of time/area efficiency without an external microcontroller. In addition, the SSEOM determines the BER-optimal equalization parameters for both CTLE and DFE by incorporating a pattern-dependent eye-tracking scheme. Auxiliary data samplers are employed in parallel with data samplers to track link variations and adjust the equalization parameters in the background. A 28-Gb/s CDR including a SSEOM-based adaptive equalizer is fabricated in 40nm CMOS for an evaluation.