A CMOS bandgap reference with high PSRR and improved temperature stability for system-on-chip applications

Abhisek Dey, T. K. Bhattacharyya
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引用次数: 9

Abstract

A high precision temperature compensated CMOS bandgap reference is implemented in UMC 0.18µm RF/CMOS process. The proposed circuit employs current-mode architecture that removes the supply as well as reference voltage limitations. Using only first order compensation the new architecture can generate an output reference voltage of 600mV with a variation of 400µV over a wide temperature range from +20°C to +100°C which corresponds to a temperature coefficient of 5.5ppm/°C. The output reference voltage exhibits a variation of 2mV for supply voltage ranging from 1.6V to 2.0V. Simulation result shows that the power supply rejection ratio of the proposed circuit is 79dB from DC up to 1kHz of frequency. The presented bandgap reference occupies only 0.09 mm2 layout area.
一种CMOS带隙基准,具有高PSRR和改进的温度稳定性,适用于片上系统应用
采用UMC 0.18µm RF/CMOS工艺实现了高精度温度补偿CMOS带隙基准。该电路采用电流模式架构,消除了电源和参考电压的限制。仅使用一阶补偿,新架构可以在+20°C至+100°C的宽温度范围内产生600mV的输出参考电压,变化幅度为400 μ V,对应于5.5ppm/°C的温度系数。在1.6V到2.0V的电压范围内,输出参考电压变化为2mV。仿真结果表明,该电路在直流至1kHz频率范围内的电源抑制比为79dB。所提出的带隙参考仅占用0.09 mm2的布局面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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