A pipelined multi-softcore approach for the HOG algorithm

Abstract

This paper describes the mapping and the acceleration of an object detection algorithm on a multiprocessor system based on an FPGA. We use HOG (Histogram of Oriented Gradients), one of the most popular algorithms for detection of different classes of objects and currently being used in smart embedded systems. The use of HOG on such systems requires efficient implementations in order to provide high performance possibly with low energy/power consumption budgets. Also, as variations and adaptations of this algorithm are needed to deal with different scenarios and classes of objects, programmability is required to allow greater development flexibility. In this paper we show our approach towards implementing the HOG algorithm into a multi-softcore Nios II based-system, bearing in mind high-performance and programmability issues. By applying source-to-source transformations we obtain speedups of 19× and by using pipelined processing we reduce the algorithms execution time 49×. We also show that improving the hardware with acceleration units can result in speedups of 72.4× compared to the embedded baseline application.