Active substrates for optoelectronic interconnect

D. Chiarulli, S. Levitan, J. Bakos, C. Kuznia
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引用次数: 2

Abstract

We present the design of an intelligent optoelectronic chip carrier (IOCC). This is an active package that is the basis for short haul, PCB by Chiarulli and Levitan (2003) and MCM by Bakos et al. (2003) and Selavo et al. (2003) level, optical interconnect. Our goal is a new solution to one of the most difficult problems associated with the packaging of chip-level optical interconnections; the dense and spatially interleaved integration of optical signaling with electric signals, power and ground. Our approach is based on an "active substrate" using Peregrine UTSi silicon on sapphire technology and the adaptation of laser drilling techniques to create vias through the sapphire. The result is an optoelectronic package that supports full CMOS performance, is mechanically and electrically compatible with current ball grid array (BGA) technology for electronic interconnect, and provides windows for active side optical I/O and substrate-side thermal extraction paths.
光电互连用有源衬底
提出了一种智能光电芯片载波(IOCC)的设计。这是一个有源封装,是短程传输的基础,Chiarulli和Levitan(2003)的PCB, Bakos等人(2003)的MCM和Selavo等人(2003)的水平,光互连。我们的目标是为与芯片级光互连封装相关的最困难问题之一提供新的解决方案;光信号与电信号、电源和地的密集和空间交错的集成。我们的方法是基于“有源衬底”,使用Peregrine UTSi硅蓝宝石技术,并采用激光钻孔技术在蓝宝石上创建通孔。其结果是光电封装支持完整的CMOS性能,机械和电气上与当前用于电子互连的球栅阵列(BGA)技术兼容,并为有源侧光学I/O和基板侧热提取路径提供窗口。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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