Reduction of test inputs for combinational circuits

Abstract

For a given method of design for testability a mechanism is proposed to reduce the number of test inputs by connecting two or more test inputs together. It is shown that by preprocessing the reconvergent fanouts it is possible to identify and remove some of the redundant reconvergent paths. Reconvergent fanouts with multiple reconvergent gates are investigated, and their application in design for testability is discussed.<>