Calculating the probability of timing violation of F/F-controlled paths with timing variations

Hyun-jeong Kwon, Young Hwan Kim
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引用次数: 1

Abstract

We propose an analytic method to calculate the probability of timing violation of F/F-controlled paths by considering timing variations. We first characterize the timing characteristics of F/Fs and path delays using a generalized canonical delay model. The probability of setup-time violation is then calculated by considering the correlation between F/Fs and logic paths. For the calculation, we used conditional tightness probability equation which reflects the nonlinearity of the process parameters. In experiments, the proposed method exhibited the error less than 7 % with respect to Monte-Carlo (MC) simulation results. Compared to the benchmark method that does not consider the variations of the timing characteristics of F/Fs, the proposed method improved the accuracy by more than 18% on average.
本文提出了一种考虑时间变化的F/F控制路径时间违逆概率的解析计算方法。我们首先用广义正则延迟模型描述了F/F和路径延迟的时序特性。然后考虑F/F与逻辑路径之间的相关性,计算出设置时间违反的概率。在计算中,我们采用了反映工艺参数非线性的条件紧密性概率方程。在实验中,该方法与蒙特卡罗(MC)模拟结果的误差小于7%。与不考虑F/F定时特性变化的基准方法相比,该方法平均提高了18%以上的精度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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