Boosted gate MOS (BGMOS): device/circuit cooperation scheme to achieve leakage-free giga-scale integration

T. Inukai, M. Takamiya, K. Nose, H. Kawaguchi, T. Hiramoto, T. Sakurai
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引用次数: 99

Abstract

This paper proposes a new device and circuit scheme that drastically suppresses the stand-by leakage current for the deep sub-0.1 /spl mu/m era while maintaining the circuit speed. Applying boosted gate voltage on the low leakage switches with higher V/sub th/ and thicker T/sub ox/, extremely low stand-by power for battery type application is achieved, while degradation of circuit performance and an increase of area overhead are sufficiently suppressed. The combination with a negative gate voltage scheme and the application of the boosted voltage scheme to SRAMs are also discussed.
升压门MOS (BGMOS):器件/电路合作方案,实现无泄漏的千兆级集成
本文提出了一种新的器件和电路方案,可以在保持电路速度的同时,大幅度地抑制深度低于0.1 /spl mu/m的待机漏电流。在具有更高V/sub /和更厚T/sub /的低漏开关上施加升压栅极电压,实现了电池类型应用的极低待机功率,同时充分抑制了电路性能的退化和面积开销的增加。并讨论了与负栅电压方案的结合以及升压方案在sram中的应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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