Implementation of 32-Bit Arithmetic Logic Unit on Xilinx using VHDL

S. G. Nayak
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引用次数: 2

Abstract

In the present day knowledge, there is an massive requisite of developing appropriate data communication interfaces for real time embedded systems. Field Programmable Gate Array (FPGA) gives various means, which can be programmed for constructing an effective embedded unit. The FPGA configuration is generally specified using a hardware description language (HDL). VHDL (VHSIC hardware description language) is a hardware description language used in electronic design automation to explain digital and mixed-signal structures such as field programmable gate arrays (FPGA) and integrated circuits. This work proposes a technique to design and implement a 32 bit ALU which is a digital circuit that performs arithmetic and logical operations on Xilinx ISE using VHDL.
32位算术逻辑单元在Xilinx上的VHDL实现
在当今的知识中,为实时嵌入式系统开发适当的数据通信接口是一个巨大的需求。现场可编程门阵列(FPGA)提供了多种方法,可以通过编程来构建有效的嵌入式单元。FPGA配置通常使用硬件描述语言HDL (hardware description language)来指定。VHDL (VHSIC硬件描述语言)是一种用于电子设计自动化的硬件描述语言,用于解释数字和混合信号结构,如现场可编程门阵列(FPGA)和集成电路。本文提出了一种设计和实现32位ALU的技术,该ALU是一种使用VHDL在Xilinx ISE上执行算术和逻辑运算的数字电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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