SIMULATION OF DRAIN DEPTH EFFECT ON PARASITIC CURRENTS IN FLASH-MEMORY CELLS.

Abstract

In present paper the drain depth effect on parasitic currents in Flash-memory cells based on short-channel MOS-transistors has been calculated by using Monte Carlo simulation of electron drift in such devices. It is shown that the increase of the drain depth leads to the decrease of the value of parasitic tunnel current. It takes place because for deep drain electron current density in the transistor channel is shifted into substrate.