Evolution of Semiconductor Packaging. Present and Future

Abstract

Summary form only given. Evolution of semiconductor packaging has taken impressive acceleration, under the pressure of new applications, combining very high volumes, innovation and cost effectiveness. Conventional single chip package completed its cycle, by reaching a die-to-package ratio close to one. And also wire bonding technology is getting close to its physical limits, at about 25-30 micron bonding pad pitch. New 3D interconnection technologies, like system in package (SiP), package on package (PoP) and, package in package (PiP), offer the unique advantage of integrating heterogeneous functions in the three dimensions of the package, which can be in some extent competitive with chip-level integration (system on chip - SoC)