Automatic software toolkit generation for embedded systems-on-chip

A. Halambi, P. Grun, H. Tomiyama, N. Dutt, A. Nicolau
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引用次数: 20

Abstract

Modern embedded Systems-on-Chips (SOCs) will allow the system designer to customize Intellectual Property (IP) cores (fixed and programmable), together with custom logic and large amounts of embedded memory. As the software content in these emerging embedded SOCs begins to dominate the SOC design process, there is a critical need for support of an integrated software development environment (including compilers, simulators and debuggers). Furthermore, since many characteristics of these processor core IPs (e.g., instruction-sets, memory configurations) are increasingly customizable, the entire software toolkit chain needs to be customized and generated to support both early design space exploration (for performance, power and cost constraints), as well as high-qualify software generation. This paper first surveys recent efforts in Architecture Description Languages (ADLs) used to perform early validation and exploration of SOC architectures. The second part of the paper focuses on approaches to software toolkit generation that automatically produce the software infrastructure (e.g., compilers, simulators, debuggers) which will enable true hardware/software codesign of these emerging embedded SOCs.
嵌入式片上系统的自动软件工具箱生成
现代嵌入式片上系统(soc)将允许系统设计人员定制知识产权(IP)内核(固定和可编程),以及定制逻辑和大量嵌入式存储器。由于这些新兴嵌入式SOC中的软件内容开始主导SOC设计过程,因此迫切需要支持集成软件开发环境(包括编译器,模拟器和调试器)。此外,由于这些处理器核心ip的许多特征(例如,指令集,内存配置)越来越可定制,整个软件工具包链需要定制和生成,以支持早期的设计空间探索(性能,功率和成本限制),以及高质量的软件生成。本文首先调查了最近在架构描述语言(adl)方面的工作,这些语言用于执行SOC架构的早期验证和探索。本文的第二部分着重于自动生成软件基础设施(例如,编译器、模拟器、调试器)的软件工具箱生成方法,这些软件基础设施将使这些新兴的嵌入式soc实现真正的硬件/软件协同设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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