A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction

X. Xue, Wenxiang Jian, Jianguo Yang, F. Xiao, Gang Chen, X. L. Xu, Yufeng Xie, Yinyin Lin, R. Huang, Qingtian Zhou, Jingang Wu
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引用次数: 31

Abstract

A 0.13μm 8Mb CuxSiyO resistive memory test macro with 20F2 cell size is developed based on logic process for the first time. Smart and adaptive assist write and read circuit are proposed and verified in order to fix yield and power consumption issues from large write speed and high temperature resistance variation. SAWM (self-adaptive write mode) helps to enlarge Roff/Ron window from 8X to 24X at room temperature. The reset bit yield is improved from 61.5% to 100% and large power consumption is eliminated after set success. SARM (Self-adaptive read mode) improves read bit yield from 98% to 100% at 125°C. The typical access time of on-pitch voltage sensing SA(sense amplifier) is 21ns and high bandwidth throughput is supported.
一种基于0.13µm 8Mb逻辑的CuxSiyO电阻式存储器,具有自适应良率提高和运行功耗降低
首次开发了基于逻辑工艺的20F2单元尺寸的0.13μm 8Mb CuxSiyO阻性内存测试宏。提出并验证了智能和自适应辅助读写电路,以解决大写入速度和高温电阻变化带来的产量和功耗问题。SAWM(自适应写入模式)有助于在室温下将Roff/Ron窗口从8倍放大到24倍。复位位率由61.5%提高到100%,复位成功后消除了较大的功耗。在125°C时,SARM(自适应读取模式)将读比特率从98%提高到100%。单节距电压感测放大器的典型访问时间为21ns,支持高带宽吞吐量。
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