A Low-Complexity Flexible Logic-Locking Scheme Resisting Removal Attacks

Abstract

Logic locking is necessary for protecting intellectual property. Although logic-locking schemes have been proposed to resist the powerful satisfiability (SAT)-based attack, many of them are subject to removal attacks, which identify the logic- locking block and replace its output by the correct signal, so the circuit would function correctly without the right key. In order to prevent removal attacks, the stripped functional logic locking-Hamming distance (SFLL-HD) scheme and its variations corrupt the original circuit and add a logic-locking block to correct the errors. The high-complexity HD checker can be also replaced by the Cascaded(CAS)-lock block. This paper proposes a new low-complexity logic-locking scheme inspired by the Generalized(G)-Anti-SAT block. By relaxing the constraint of the G-Anti-SAT design in the SFLL setting, our new logic-locking scheme reduces the logic complexity by around 37% compared to the M-CAS block with similar resistance to the SAT and removal attacks. Additionally, unlike the SFLL-HD and Mirrored (M)- CAS schemes, the proposed logic-locking block can use a large variation of functions. This makes existing or potential attacks utilizing properties of the logic function impossible.