LEGO-based VLSI design and implementation of polar codes encoder architecture with radix-2 processing engines

Xin-Yu Shih, Po-Chun Huang, Yu-Chun Chen
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引用次数: 4

Abstract

Polar Codes become a new channel coding, which will be common to apply for next-generation wireless MIMO communication systems. In this work, we propose LEGO-based VLSI hardware design and implementation of the Polar encoder using radix-2 processing engines, which features low area cost, low power dissipation, high speed, and high throughput via serial computation. Under TSMC 90nm CMOS technology, the 16384-point LEGO-based radix-2 Polar encoder chip (LB-R2-PE) is designed and synthesized with total area of 0.244mm2 and power dissipation of 366.6mW, operating at maximum frequency of 2.0GHz. In the APR chip implementation point-of-view, the 16384-point LB-R2-PE chip only occupies 0.305mm2 and consumes 357.8mW with maximum operating frequency of 1.61GHz, delivering total throughput of 1.61Gbps.
基于乐高的VLSI极码编码器结构设计与实现,采用基数2处理引擎
Polar码是一种新的信道编码,将普遍应用于下一代无线MIMO通信系统。在这项工作中,我们提出了基于乐高的VLSI硬件设计和实现Polar编码器,使用基数-2处理引擎,具有低面积成本,低功耗,高速和高吞吐量的特点。采用台积电90nm CMOS技术,设计合成了基于16384点lego的radix-2 Polar编码器芯片(LB-R2-PE),该芯片的总面积为0.244mm2,功耗为366.6mW,最高工作频率为2.0GHz。从APR芯片实现角度来看,16384点LB-R2-PE芯片仅占地0.305mm2,功耗357.8mW,最大工作频率为1.61GHz,总吞吐量为1.61Gbps。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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