{"title":"LEGO-based VLSI design and implementation of polar codes encoder architecture with radix-2 processing engines","authors":"Xin-Yu Shih, Po-Chun Huang, Yu-Chun Chen","doi":"10.1109/APCCAS.2016.7804057","DOIUrl":null,"url":null,"abstract":"Polar Codes become a new channel coding, which will be common to apply for next-generation wireless MIMO communication systems. In this work, we propose LEGO-based VLSI hardware design and implementation of the Polar encoder using radix-2 processing engines, which features low area cost, low power dissipation, high speed, and high throughput via serial computation. Under TSMC 90nm CMOS technology, the 16384-point LEGO-based radix-2 Polar encoder chip (LB-R2-PE) is designed and synthesized with total area of 0.244mm2 and power dissipation of 366.6mW, operating at maximum frequency of 2.0GHz. In the APR chip implementation point-of-view, the 16384-point LB-R2-PE chip only occupies 0.305mm2 and consumes 357.8mW with maximum operating frequency of 1.61GHz, delivering total throughput of 1.61Gbps.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7804057","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Polar Codes become a new channel coding, which will be common to apply for next-generation wireless MIMO communication systems. In this work, we propose LEGO-based VLSI hardware design and implementation of the Polar encoder using radix-2 processing engines, which features low area cost, low power dissipation, high speed, and high throughput via serial computation. Under TSMC 90nm CMOS technology, the 16384-point LEGO-based radix-2 Polar encoder chip (LB-R2-PE) is designed and synthesized with total area of 0.244mm2 and power dissipation of 366.6mW, operating at maximum frequency of 2.0GHz. In the APR chip implementation point-of-view, the 16384-point LB-R2-PE chip only occupies 0.305mm2 and consumes 357.8mW with maximum operating frequency of 1.61GHz, delivering total throughput of 1.61Gbps.