A systolic exponentiator for finite fields GF(2/sup m/)

Chin-Liang Wang
{"title":"A systolic exponentiator for finite fields GF(2/sup m/)","authors":"Chin-Liang Wang","doi":"10.1109/MWSCAS.1991.252045","DOIUrl":null,"url":null,"abstract":"The author presents a novel parallel-in-parallel-out bit-level systolic array with unidirectional data flow for computing exponentiation in GF(2/sup m/). The array is highly regular and modular, and thus well it is suited to VLSI implementation. In addition, it can provide the maximum throughput in the sense of producing new results at a rate of one per clock cycle. Compared to a previously known systolic (GF2/sup m/) exponentiator with the same throughput performance, the proposed system requires much less chip area, has smaller latency, and makes it easier to incorporate fault-tolerant design.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"25 1","pages":"279-282 vol.1"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.1991.252045","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

The author presents a novel parallel-in-parallel-out bit-level systolic array with unidirectional data flow for computing exponentiation in GF(2/sup m/). The array is highly regular and modular, and thus well it is suited to VLSI implementation. In addition, it can provide the maximum throughput in the sense of producing new results at a rate of one per clock cycle. Compared to a previously known systolic (GF2/sup m/) exponentiator with the same throughput performance, the proposed system requires much less chip area, has smaller latency, and makes it easier to incorporate fault-tolerant design.<>
有限域GF(2/sup m/)的收缩指数
本文提出了一种新型的、具有单向数据流的并行并行输出位级收缩阵列,用于计算GF(2/sup m/)中的幂运算。该阵列具有高度的规则性和模块化,因此非常适合VLSI的实现。此外,它可以提供最大的吞吐量,以每个时钟周期产生一个新结果的速率。与先前已知的具有相同吞吐量性能的收缩指数(GF2/sup m/)相比,所提出的系统需要更少的芯片面积,具有更小的延迟,并且更容易纳入容错设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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