{"title":"Analytical Model of Subthreshold Swing for Junctionless Double Gate MOSFET Using Ferroelectric Negative Capacitance Effect","authors":"H. Jung","doi":"10.31436/iiumej.v24i1.2508","DOIUrl":null,"url":null,"abstract":"An analytical Subthreshold Swing (SS) model is presented to observe the change in the SS when a stacked SiO2-metal-ferroelectric structure is used as the oxide film of a JunctionLess Double Gate (JLDG) MOSFET. The SS of 60 mV/dec or less is essential to reduce power dissipation while maintaining transistor performance. If a ferroelectric material with Negative Capacitance (NC) effect is used, the SS can be reduced below 60 mV/dec. The analytical SS model of the ferroelectric NC FET presented to analyze this was in good agreement with the SS derived from the relation between the drain current and gate voltage, using 2D potential distribution. As results were derived from the analytical SS model, it was found that it is possible to obtain an SS of 60 mV/dec or less even at 15 nm channel length by adjusting the thicknesses of the silicon channel, SiO2, and ferroelectric. In particular, the change in SS according to the ferroelectric thickness was saturated as the thickness of SiO2 increased and was almost constant as the thickness of the silicon channel decreased.\nABSTRAK: Model Ayunan Subambang (SS) analitikal dibentangkan bagi melihat perubahan pada SS apabila struktur feroelektrik-logam-SiO2 bertindan digunakan sebagai filem oksida bagi MOSFET Dua Get Tanpa Simpang (JLDG). SS 60 mV/dec atau kurang adalah penting bagi mengurangkan pelesapan kuasa sambil mengekalkan prestasi transistor. Jika bahan feroelektrik dengan kesan Kapasitans Negatif (NC) digunakan, SS dapat dikurangkan bawah 60 mV/dek. Model SS analitikal feroelektrik NC FET yang digunakan bagi kajian ini adalah sesuai dengan SS yang diperoleh daripada hubungan antara arus serapan dan voltan get, menggunakan edaran potensi 2D. Dapatan terbitan melalui model SS analitikal, mendapati bahawa adalah mungkin bagi mendapatkan SS pada 60 mV/dek atau kurang walaupun panjang laluan adalah 15 nm dengan melaraskan ketebalan saluran silikon, SiO2, dan feroelektrik. Terutama apabila perubahan ketebalan feroelektrik SS adalah tepu ketika ketebalan SiO2 meningkat, dan hampir malar apabila ketebalan saluran silikon berkurang.","PeriodicalId":13439,"journal":{"name":"IIUM Engineering Journal","volume":"22 1","pages":""},"PeriodicalIF":0.6000,"publicationDate":"2023-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IIUM Engineering Journal","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.31436/iiumej.v24i1.2508","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, MULTIDISCIPLINARY","Score":null,"Total":0}
引用次数: 0
Abstract
An analytical Subthreshold Swing (SS) model is presented to observe the change in the SS when a stacked SiO2-metal-ferroelectric structure is used as the oxide film of a JunctionLess Double Gate (JLDG) MOSFET. The SS of 60 mV/dec or less is essential to reduce power dissipation while maintaining transistor performance. If a ferroelectric material with Negative Capacitance (NC) effect is used, the SS can be reduced below 60 mV/dec. The analytical SS model of the ferroelectric NC FET presented to analyze this was in good agreement with the SS derived from the relation between the drain current and gate voltage, using 2D potential distribution. As results were derived from the analytical SS model, it was found that it is possible to obtain an SS of 60 mV/dec or less even at 15 nm channel length by adjusting the thicknesses of the silicon channel, SiO2, and ferroelectric. In particular, the change in SS according to the ferroelectric thickness was saturated as the thickness of SiO2 increased and was almost constant as the thickness of the silicon channel decreased.
ABSTRAK: Model Ayunan Subambang (SS) analitikal dibentangkan bagi melihat perubahan pada SS apabila struktur feroelektrik-logam-SiO2 bertindan digunakan sebagai filem oksida bagi MOSFET Dua Get Tanpa Simpang (JLDG). SS 60 mV/dec atau kurang adalah penting bagi mengurangkan pelesapan kuasa sambil mengekalkan prestasi transistor. Jika bahan feroelektrik dengan kesan Kapasitans Negatif (NC) digunakan, SS dapat dikurangkan bawah 60 mV/dek. Model SS analitikal feroelektrik NC FET yang digunakan bagi kajian ini adalah sesuai dengan SS yang diperoleh daripada hubungan antara arus serapan dan voltan get, menggunakan edaran potensi 2D. Dapatan terbitan melalui model SS analitikal, mendapati bahawa adalah mungkin bagi mendapatkan SS pada 60 mV/dek atau kurang walaupun panjang laluan adalah 15 nm dengan melaraskan ketebalan saluran silikon, SiO2, dan feroelektrik. Terutama apabila perubahan ketebalan feroelektrik SS adalah tepu ketika ketebalan SiO2 meningkat, dan hampir malar apabila ketebalan saluran silikon berkurang.
提出了一种分析亚阈值摆幅(SS)模型,用于观察在无结双栅(JLDG) MOSFET的氧化膜中使用堆叠的sio2 -金属-铁电结构时SS的变化。60 mV/dec或更低的SS对于在保持晶体管性能的同时降低功耗至关重要。如果使用具有负电容(NC)效应的铁电材料,则SS可以降低到60 mV/dec以下。为分析这一问题所建立的铁电NC场效应管的解析SS模型与利用二维电位分布从漏极电流与栅极电压的关系中得到的SS很好地吻合。根据分析SS模型得出的结果发现,通过调整硅通道、SiO2和铁电层的厚度,即使在15 nm通道长度下,也可以获得60 mV/dec或更低的SS。特别是随着SiO2厚度的增加,SS随铁电厚度的变化趋于饱和,随着硅沟道厚度的减小,SS几乎保持不变。摘要:模型Ayunan Subambang (SS)分析dibentangkan bagi melihaperperbahan papass能力结构、elektrik-logam- sio2 bertindan digunakan sebagai膜oksida bagi MOSFET Dua Get Tanpa Simpang (JLDG)。SS 60毫伏/dec atau kurang adalah penting bagi mengurangkan pelesapan kuasa sambil mengekalkan presstasi晶体管。Jika bahan feroelektrik dengan kesan Kapasitans Negatif (NC) digunakan, SS dapat dikurangkan bawah 60 mV/dek。模型SS分析电路NC FET yang diperoleh daripada hubungan antara arus serapan dan voltan get, menggunakan edaran potential 2D。Dapatan terbitan melalui model SS analitial, mendapati bahawa adalah mungkin bagi mendapatkan SS pada 60 mV/dek atau kurang walaupun panjang laluan adalah 15 nm dengan melaraskan ketebalan saluran silica, SiO2, dan feroelektrik。Terutama apabila perubahan ketebalan ferelektrik SS adalah tepu ketika ketebalan SiO2 meningkat, dan hampir malar apabila ketebalan saluran silicon berkurang。
期刊介绍:
The IIUM Engineering Journal, published biannually (June and December), is a peer-reviewed open-access journal of the Faculty of Engineering, International Islamic University Malaysia (IIUM). The IIUM Engineering Journal publishes original research findings as regular papers, review papers (by invitation). The Journal provides a platform for Engineers, Researchers, Academicians, and Practitioners who are highly motivated in contributing to the Engineering disciplines, and Applied Sciences. It also welcomes contributions that address solutions to the specific challenges of the developing world, and address science and technology issues from an Islamic and multidisciplinary perspective. Subject areas suitable for publication are as follows: -Chemical and Biotechnology Engineering -Civil and Environmental Engineering -Computer Science and Information Technology -Electrical, Computer, and Communications Engineering -Engineering Mathematics and Applied Science -Materials and Manufacturing Engineering -Mechanical and Aerospace Engineering -Mechatronics and Automation Engineering