Hardware implementation of nonstationary structural dynamics forecasting

Abstract

High-rate time series forecasting has applications in the domain of high-rate structural health monitoring and control. Hypersonic vehicles and space infrastructure are examples of structural systems that would benefit from time series forecasting on temporal data, including oscillations of control surfaces or structural response to an impact. This paper reports on the development of a software-hardware methodology for the deterministic and low-latency time series forecasting of structural vibrations. The proposed methodology is a software-hardware co-design of a fast Fourier transform (FFT) approach to time series forecasting. The FFT-based technique is implemented in a variable-length sequence configuration. The data is first de-trended, after which the time series data is translated to the frequency domain, and frequency, amplitude, and phase measurements are acquired. Next, a subset of frequency components is collected, translated back to the time domain, recombined, and the data's trend is recovered. Finally, the recombined signals are propagated into the future to the chosen forecasting horizon. The developed methodology achieves fully deterministic timing by being implemented on a Field Programmable Gate Array (FPGA). The developed methodology is experimentally validated on a Kintex-7 70T FPGA using structural vibration data obtained from a test structure with varying levels of nonstationarities. Results demonstrate that the system is capable of forecasting time series data 1 millisecond into the future. Four data acquisition sampling rates from 128 to 25600 S/s are investigated and compared. Results show that for the current hardware (Kintex-7 70T), only data sampled at 512 S/s is viable for real-time time series forecasting with a total system latency of 39.05 μs in restoring signal. In totality, this research showed that for the considered FFT-based time series algorithm the fine-tuning of hyperparameters for a specific sampling rate means that the usefulness of the algorithm is limited to a signal that does not shift considerably from the frequency information of the original signal. FPGA resource utilization, timing constraints of various aspects of the methodology, and the algorithm accuracy and limitations concerning different data are discussed.