Bipolar Transistor Effect in SOI MOS Structures on the Hardness to the Impact of Heavy Ion

Abstract

The effect of a parasitic bipolar transistor on the electrical characteristics of SOI n-MOS transistor, developed using a technology with a minimum design length of 0.5 μm, when impact heavy charged particle (from now on - HCP), is investigated. The volt-ampere characteristics of the main and parasitic transistors were measured, and the TCAD models were calibrated using measurements. The simulation of the impact of HCP on the three-dimensional structure of SOI n-MOS transistor was carried on. The influence of the parasitic bipolar transistor on the hardness to the HCP impact was estimated by the example of a separate n-channel transistor, as well as part of an inverter.