{"title":"Investigation of computational cost model of MLP parallel batch training algorithm","authors":"V. Turchenko, L. Grandinetti","doi":"10.1109/ISIEA.2009.5356307","DOIUrl":null,"url":null,"abstract":"The development of a parallel batch back propagation training algorithm of a multilayer perceptron and its computational cost model are presented in this paper. The computational cost model of the parallel algorithm is developed using Bulk Synchronous Parallelism approach. The concrete parameters of the computational cost model are obtained. The developed computational cost model is used for theoretical prediction of a parallelization efficiency of the algorithm. The predicted and real parallelization efficiencies are compared for different parallelization scenarios on two parallel high performance computers.","PeriodicalId":6447,"journal":{"name":"2009 IEEE Symposium on Industrial Electronics & Applications","volume":"54 1","pages":"990-995"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Symposium on Industrial Electronics & Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIEA.2009.5356307","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The development of a parallel batch back propagation training algorithm of a multilayer perceptron and its computational cost model are presented in this paper. The computational cost model of the parallel algorithm is developed using Bulk Synchronous Parallelism approach. The concrete parameters of the computational cost model are obtained. The developed computational cost model is used for theoretical prediction of a parallelization efficiency of the algorithm. The predicted and real parallelization efficiencies are compared for different parallelization scenarios on two parallel high performance computers.