A 78.8–92.8 GHz 4-bit 0–360° active phase shifter in 28nm FDSOI CMOS with 2.3 dB average peak gain

D. Pepe, D. Zito
{"title":"A 78.8–92.8 GHz 4-bit 0–360° active phase shifter in 28nm FDSOI CMOS with 2.3 dB average peak gain","authors":"D. Pepe, D. Zito","doi":"10.1109/ESSCIRC.2015.7313829","DOIUrl":null,"url":null,"abstract":"A 78.8-92.8 GHz 4-bit (16 phases) digitally controlled vector modulator active phase shifter has been designed and implemented in 28nm FDSOI CMOS by STMicroelectronics. The phase shifter exploits a novel IQ generator based on a cascode amplifier incorporating a lumped element coupled line quadrature coupler to generate the in-phase (I) and quadrature (Q) signals. The phase shifter consumes 18 mA from a 1.2 V supply. The measured performances are: average gain of 2.3 dB at 87.4 GHz (between 3.2 and -1.6 dB for the 16 phase states) and -3 dB bandwidth (B3dB) from 78.8 to 92.8 GHz; RMS gain error equal to 1.68 dB at 87.4 GHz and lower than 2 dB in the B3dB; RMS phase error equal to 9.4o at 87.4 GHz and lower than 11.9o in the B3dB; S11 lower than -10.5 dB in the B3dB; average input referred 1 dB compression point of -7 dBm (between -8 and -5 dBm for the 16 phase states); average noise figure equal to 10.8 dB at 87 GHz (between -9 and -12 dB for the 16 phase states).","PeriodicalId":11845,"journal":{"name":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2015-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2015.7313829","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19

Abstract

A 78.8-92.8 GHz 4-bit (16 phases) digitally controlled vector modulator active phase shifter has been designed and implemented in 28nm FDSOI CMOS by STMicroelectronics. The phase shifter exploits a novel IQ generator based on a cascode amplifier incorporating a lumped element coupled line quadrature coupler to generate the in-phase (I) and quadrature (Q) signals. The phase shifter consumes 18 mA from a 1.2 V supply. The measured performances are: average gain of 2.3 dB at 87.4 GHz (between 3.2 and -1.6 dB for the 16 phase states) and -3 dB bandwidth (B3dB) from 78.8 to 92.8 GHz; RMS gain error equal to 1.68 dB at 87.4 GHz and lower than 2 dB in the B3dB; RMS phase error equal to 9.4o at 87.4 GHz and lower than 11.9o in the B3dB; S11 lower than -10.5 dB in the B3dB; average input referred 1 dB compression point of -7 dBm (between -8 and -5 dBm for the 16 phase states); average noise figure equal to 10.8 dB at 87 GHz (between -9 and -12 dB for the 16 phase states).
78.8-92.8 GHz 4位0-360°有源移相器,28nm FDSOI CMOS,平均峰值增益2.3 dB
意法半导体(STMicroelectronics)设计并实现了一种78.8-92.8 GHz 4位(16相)数字控制矢量调制器有源移相器。移相器利用了一种新型的IQ发生器,该发生器基于级联放大器,并结合了集总元件耦合线正交耦合器来产生同相(I)和正交(Q)信号。移相器从1.2 V电源消耗18ma。测量的性能是:87.4 GHz时的平均增益为2.3 dB(16个相态在3.2到-1.6 dB之间),78.8到92.8 GHz的带宽为-3 dB (B3dB);87.4 GHz时RMS增益误差等于1.68 dB, B3dB时小于2 dB;RMS相位误差在87.4 GHz时等于9.40,在B3dB时小于11.90;S11在B3dB中低于-10.5 dB;平均输入参考1db压缩点为- 7dbm(16个相态在-8 ~ - 5dbm之间);87 GHz时的平均噪声系数为10.8 dB(16个相位状态下为-9至-12 dB)。
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