Switching Loss Analysis of SiC-MOSFET based on Stray Inductance Scaling

K. Wada, M. Ando
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引用次数: 10

Abstract

Recently, high-speed switching circuits using SiC power modules have been developed for using the next-generation power converter circuits. The stray inductances inside the converter circuit caused by among DC capacitors, bus bars, and power module package are one of the most critical parameters, which influence not only the over-voltage but also the switching loss. This paper proposes a quantitative design procedure for the switching losses depending the stray inductances. This paper focuses on the effects of stray inductance on both the turn-on and turn-off losses, and the quantitative analyses are explained using a stray inductance scaling method. To verify the design procedure, experimental results rated at 500 V and 160 A are demonstrated using an all-SiC power module.
基于杂散电感缩放的SiC-MOSFET开关损耗分析
近年来,采用SiC功率模块的高速开关电路已被开发出来,用于下一代功率转换电路。直流电容、母线和电源模块封装之间产生的杂散电感是变换器电路中最关键的参数之一,它不仅影响过电压,而且影响开关损耗。本文提出了一种基于杂散电感的开关损耗定量设计方法。本文重点研究了杂散电感对导通和关断损耗的影响,并用杂散电感标度法进行了定量分析。为了验证设计过程,使用全sic电源模块演示了额定500v和160a的实验结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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