Modulation Improvements for High Phase-Count Series-Capacitor Buck Converters

IF 1 4区 工程技术 Q4 COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS
Gianluca Roberts, A. Prodic
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引用次数: 0

Abstract

This paper presents various phase activation sequences which raise the maximum input-to-output voltage conversion ratio of an N-inductor, N-phase Series-Capacitor (SerC) Buck Converter beyond the traditional limit of $1/N^{2}$. Phase counts up to 16 are analysed with conversion ratios increasing by a factor of up to 7. This paper additionally introduces a modulation technique that effectively increases the DPWM output voltage resolution by a factor of N by employing a novel method of minor duty increments (MDI). An experimental discrete prototype of an 11-phase, 48V–1.0VSerC Buck was fabricated to validate both the increase in the output voltage ceiling and DPWM resolution, as well as to evaluate the MDI-DPWM output voltage linearity.
高相数串联电容降压变换器的调制改进
本文提出了不同的相位激活顺序,使N电感N相串联电容(SerC)降压变换器的最大输入输出电压转换比超过传统的1/N^{2}$的限制。相位计数最多可达16,转换率最多可增加7倍。此外,本文还介绍了一种调制技术,该技术通过采用一种新颖的小占空增量(MDI)方法,有效地将DPWM输出电压分辨率提高了N倍。制作了11相48V-1.0VSerC Buck的实验离散原型,验证了输出电压上限和DPWM分辨率的提高,并评估了MDI-DPWM输出电压的线性度。
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来源期刊
CiteScore
1.60
自引率
0.00%
发文量
124
审稿时长
4.2 months
期刊介绍: COMPEL exists for the discussion and dissemination of computational and analytical methods in electrical and electronic engineering. The main emphasis of papers should be on methods and new techniques, or the application of existing techniques in a novel way. Whilst papers with immediate application to particular engineering problems are welcome, so too are papers that form a basis for further development in the area of study. A double-blind review process ensures the content''s validity and relevance.
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