Embedded DRAM: an element and circuit evaluation

Abstract

Embedded DRAM memory cells employing advanced capacitor dielectrics (Ta/sub 2/O/sub 5/) have been designed, fabricated, and measured. Memory cell data retention time is used to compare capacitor characteristics between four Ta/sub 2/O/sub 5/ equipment vendors. Static behavior in one type of DRAM cell is attributed to the bimodal current-voltage characteristic of the Ta/sub 2/O/sub 5/, and circuit topography.