M. J. Canet, F. Vicedo, V. Almenar-Terre, J. Valls-Coquillat, E. Lima
{"title":"Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2","authors":"M. J. Canet, F. Vicedo, V. Almenar-Terre, J. Valls-Coquillat, E. Lima","doi":"10.1007/978-3-540-30117-2_51","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"2 1","pages":"494-504"},"PeriodicalIF":0.0000,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/978-3-540-30117-2_51","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}