Platform Independent Implementation of High Speed Serial Communication Based on FPGA

C. Raj, S. Rajkumar, Чанчал Радж, Сантош Мохан Ражкумар
{"title":"Platform Independent Implementation of High Speed Serial Communication Based on FPGA","authors":"C. Raj, S. Rajkumar, Чанчал Радж, Сантош Мохан Ражкумар","doi":"10.17516/1999-494X-2016-9-2-189-196","DOIUrl":null,"url":null,"abstract":"In various embedded system applications, the high speed multi-serial communication is necessary. Various embedded systems require DSP (Digital Signal Processing) to process information & FPGA to control the peripheral devices. UART (Universal Asynchronous Receive Transmit) is designed in FPGA & connected to DSP so as to meet the real time capability of system along with compact, stable & reliable data transmission. In this paper we propose a software-implementation technique of an UART to get a platform independent UART-core for high speed serial communication in FPGA. Here the core is written in Verilog & implemented using XILINX ISE.","PeriodicalId":11548,"journal":{"name":"Engineering & Technologies","volume":"25 1","pages":"189-196"},"PeriodicalIF":0.0000,"publicationDate":"2016-02-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Engineering & Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.17516/1999-494X-2016-9-2-189-196","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

In various embedded system applications, the high speed multi-serial communication is necessary. Various embedded systems require DSP (Digital Signal Processing) to process information & FPGA to control the peripheral devices. UART (Universal Asynchronous Receive Transmit) is designed in FPGA & connected to DSP so as to meet the real time capability of system along with compact, stable & reliable data transmission. In this paper we propose a software-implementation technique of an UART to get a platform independent UART-core for high speed serial communication in FPGA. Here the core is written in Verilog & implemented using XILINX ISE.
基于FPGA的高速串行通信平台独立实现
在各种嵌入式系统应用中,高速多串行通信是必不可少的。各种嵌入式系统需要DSP(数字信号处理)来处理信息和FPGA来控制外围设备。为了满足系统的实时性和数据传输紧凑、稳定、可靠,在FPGA上设计了通用异步接收传输(UART, Universal Asynchronous Receive - Transmit),并与DSP相连。本文提出了一种UART的软件实现技术,为FPGA中的高速串行通信提供了独立于平台的UART核心。这里的核心是用Verilog编写的,并使用XILINX ISE实现。
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