Defects and lifetime prediction for GE pMOSFETs under AC NBTI stresses

Abstract

Germanium has higher hole mobility and is a candidate for replacing silicon for pMOSFETs. This work reviews the recent progresses in understanding the negative bias temperature instability (NBTI) of Ge pMOSFETs and compares it with SiON/Si devices. Both Ge and SiON/Si devices have two groups of defects: as-grown hole traps (AHT) and generated defects (GDs). The generation process, however, is different: GDs are interface-controlled for SiON/Si and dielectric-controlled for Ge devices. This leads to substantially higher GDs under DC stress than under AC stress for Ge, although they are similar for SiON/Si devices. Moreover, GDs alter their energy levels with charge status and can be reset to original precursor states after neutralization for Ge, but these processes are insignificant for SiON/Si. The impact of these differences on lifetime prediction will be presented and the defects and physical mechanism will be explored.