Memory and Logic soft error improvement using phase transition material assisted transistors

Abstract

Phase transition Material (PTM) assisted logic and SRAM bitcells have been proposed with improved soft error tolerance. The large insulating resistance of PTM hinders the propagation of glitches to subsequent stages thereby improving the immunity to radiation strikes. Also, the abrupt switching to metallic phase minimizes the delay penalty thereby offering an optimized solution. We present a detailed PTM parameter optimization for optimum soft error performance. We also quantify the improvement in the Soft Error Tolerance of logic and 6T SRAM bit cell configuration.