{"title":"Robust clock ensemble for time and frequency reference system","authors":"Qinghua Wang, F. Droz, P. Rochat","doi":"10.1109/FCS.2015.7138861","DOIUrl":null,"url":null,"abstract":"A robust clock ensemble is proposed for the time and frequency reference system to improve the robustness and performance of the system. Studies on the feasibility of hardware and algorithm approaches have been conducted. All clocks in the ensemble are locked in phase and frequency via the steering loop. The system performs corrections on the master clock in function of weighted averaging of clocks to generate one ensemble output, and the clock fault detection and compensation is implemented in real time with minimum three clocks powered. As the design has been demonstrated on an elegant breadboard of the Robust Onboard Frequency Reference Subsystem, this concept is proposed for the next-generation of Precise Timing Facility. Simulation results have demonstrated its capability and simplicity to provide a smooth and reliable timing or frequency output even in presence of clock feared events.","PeriodicalId":57667,"journal":{"name":"时间频率公报","volume":"98 1","pages":"374-378"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"时间频率公报","FirstCategoryId":"1089","ListUrlMain":"https://doi.org/10.1109/FCS.2015.7138861","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A robust clock ensemble is proposed for the time and frequency reference system to improve the robustness and performance of the system. Studies on the feasibility of hardware and algorithm approaches have been conducted. All clocks in the ensemble are locked in phase and frequency via the steering loop. The system performs corrections on the master clock in function of weighted averaging of clocks to generate one ensemble output, and the clock fault detection and compensation is implemented in real time with minimum three clocks powered. As the design has been demonstrated on an elegant breadboard of the Robust Onboard Frequency Reference Subsystem, this concept is proposed for the next-generation of Precise Timing Facility. Simulation results have demonstrated its capability and simplicity to provide a smooth and reliable timing or frequency output even in presence of clock feared events.