{"title":"A 10 mW 60GHz 65nm CMOS DCO with 24% tuning range and 40 kHz frequency granularity","authors":"A. Hussein, Shadi Saberi, J. Paramesh","doi":"10.1109/CICC.2015.7338482","DOIUrl":null,"url":null,"abstract":"This paper presents a wide tuning range mm-wave digitally controlled oscillator (DCO) with very fine frequency tuning granularity. Switched coupled-inductor and switched-capacitor banks provide the coarse tuning to achieve 24% tuning range from 48.1 GHz to 61.3 GHz. A fine frequency tuning resolution of 39 kHz is achieved using capacitive degeneration. The 65 nm CMOS DCO consumes 10mA from 1V supply voltage, and the DCO with output shunt-peaking buffer occupy an active area of 0.0322mm2. The measured max/average/min phase noise at 1 MHz and 10MHz offset are -88.8/-91.9/-95.1dBc/Hz and -114/-116.8/-119.5dBc/Hz respectively. The figure-of-merit varies from -186.4dB to -182.2dB which is better than figure-of-merit of recent mm-wave DCO benchmarks.","PeriodicalId":6665,"journal":{"name":"2015 IEEE Custom Integrated Circuits Conference (CICC)","volume":"32 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2015.7338482","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
This paper presents a wide tuning range mm-wave digitally controlled oscillator (DCO) with very fine frequency tuning granularity. Switched coupled-inductor and switched-capacitor banks provide the coarse tuning to achieve 24% tuning range from 48.1 GHz to 61.3 GHz. A fine frequency tuning resolution of 39 kHz is achieved using capacitive degeneration. The 65 nm CMOS DCO consumes 10mA from 1V supply voltage, and the DCO with output shunt-peaking buffer occupy an active area of 0.0322mm2. The measured max/average/min phase noise at 1 MHz and 10MHz offset are -88.8/-91.9/-95.1dBc/Hz and -114/-116.8/-119.5dBc/Hz respectively. The figure-of-merit varies from -186.4dB to -182.2dB which is better than figure-of-merit of recent mm-wave DCO benchmarks.